[all-commits] [llvm/llvm-project] 8f6a1a: [GISel][AArch64] Combine G_BUILD_VECTOR(G_UNMERGE)...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8f6a1a07cb85980013c70d5af6d28f5fcf75e732
      https://github.com/llvm/llvm-project/commit/8f6a1a07cb85980013c70d5af6d28f5fcf75e732
  Author: David Green <david.green at arm.com>
  Date:   2023-08-22 (Tue, 22 Aug 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
    M llvm/test/CodeGen/AArch64/fabs.ll
    M llvm/test/CodeGen/AArch64/fcvt.ll
    M llvm/test/CodeGen/AArch64/fminimummaximum.ll
    M llvm/test/CodeGen/AArch64/fminmax.ll
    M llvm/test/CodeGen/AArch64/fpext.ll
    M llvm/test/CodeGen/AArch64/fptrunc.ll
    M llvm/test/CodeGen/AArch64/fsqrt.ll
    M llvm/test/CodeGen/AArch64/zext.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll

  Log Message:
  -----------
  [GISel][AArch64] Combine G_BUILD_VECTOR(G_UNMERGE) with undef elements

This extends the existing legalization combine to fold G_BUILD_VECTOR where the
sources are all from the same G_UNMERGE, to handle cases where some of the
lanes are undef. This comes up in the legalization of <3 x ..> vectors in
AArch64, where they are padded with undef.

There are two choices for what to create. This patch just removes the
G_BUILD_VECTOR/G_UNMERGE, losing the information about which lanes are undef.
The alternative would be to generate an identity G_SHUFFLE_VECTOR with undef
lanes marked as undef. I think both have advantages and disadvantages.

Differential Revision: https://reviews.llvm.org/D158063