[all-commits] [llvm/llvm-project] f36e19: [mlir][bufferization] Improve `bufferizesToElement...

[Matthias Springer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f36e19347fca388b80a890ca1b1e785920536289
      https://github.com/llvm/llvm-project/commit/f36e19347fca388b80a890ca1b1e785920536289
  Author: Matthias Springer <me at m-sp.org>
  Date:   2023-08-22 (Tue, 22 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
    M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
    M mlir/lib/Dialect/Linalg/Transforms/BufferizableOpInterfaceImpl.cpp
    M mlir/test/Dialect/Linalg/one-shot-bufferize-analysis.mlir

  Log Message:
  -----------
  [mlir][bufferization] Improve `bufferizesToElementwiseAccess`

The operands for which elementwise access is relevant can now be specified. All other operands are ignored. This is useful because only two particular operands participate in a RaW conflict. Furthermore, the two tensors no longer must be equivalent to rule out conflicts due to elementwise access. Equivalent tensor sets may be formed after an inplace bufferization decision is made. The two tensors are actually not required to be equivalent. The only important thing is that they have "equivalent" indexing into the same base buffer.

Differential Revision: https://reviews.llvm.org/D158428