[all-commits] [llvm/llvm-project] a3b11c: [RISCV][NFC] Move tests of inline asm memory const...

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a3b11ce78680ef39e4dfbc72085ae3e1814e3cba
      https://github.com/llvm/llvm-project/commit/a3b11ce78680ef39e4dfbc72085ae3e1814e3cba
  Author: wangpc <wangpengcheng.pp at bytedance.com>
  Date:   2023-08-21 (Mon, 21 Aug 2023)

  Changed paths:
    A llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
    M llvm/test/CodeGen/RISCV/inline-asm.ll

  Log Message:
  -----------
  [RISCV][NFC] Move tests of inline asm memory constraints to separate file

We will need to check the output of medium code model.

Reviewed By: wangpc

Differential Revision: https://reviews.llvm.org/D157965


  Commit: dc60003ec8b2faf595b528a39f64b697a589da06
      https://github.com/llvm/llvm-project/commit/dc60003ec8b2faf595b528a39f64b697a589da06
  Author: wangpc <wangpengcheng.pp at bytedance.com>
  Date:   2023-08-21 (Mon, 21 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll

  Log Message:
  -----------
  [RISCV] Support global address as inline asm memory operand of `m`

In D146245, we have supported lowering inline asm `m` with offset
to `register+imm`, but we didn't handle the case that the offset
is the low part of global address.

This patch will emit `%lo(g)` when `g` is a global address.

Fixes #64656

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D157839


Compare: https://github.com/llvm/llvm-project/compare/185185825504...dc60003ec8b2