[all-commits] [llvm/llvm-project] 8ce23b: [mlir][ArmSME] Add vector to tile intrinsics

[Cullen Rhodes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8ce23b8e5c91c530d25c13f97b6f4cbacfe34b3c
      https://github.com/llvm/llvm-project/commit/8ce23b8e5c91c530d25c13f97b6f4cbacfe34b3c
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2023-08-21 (Mon, 21 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
    M mlir/include/mlir/IR/CommonTypeConstraints.td
    A mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
    M mlir/test/Target/LLVMIR/arm-sme.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Add vector to tile intrinsics

Add support for following vector to tile (MOVA) intrinsics to ArmSME
dialect:

  llvm.aarch64.sme.write.vert
  llvm.aarch64.sme.write.horiz

Includes the definition of new type predicate
'ScalableVectorOfRankAndLengthAndType' in OpBase.td.

Reviewed By: awarzynski, dcaballe

Differential Revision: https://reviews.llvm.org/D157004