[all-commits] [llvm/llvm-project] 13454a: [RISCV] Compress stack insts by adjust offset.

[Jie Fu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 13454a6e8744e510212e750b7a7dc9da8c41943c
      https://github.com/llvm/llvm-project/commit/13454a6e8744e510212e750b7a7dc9da8c41943c
  Author: laichunfeng <laichunfeng at tencent.com>
  Date:   2023-08-18 (Fri, 18 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    A llvm/test/CodeGen/RISCV/stack-inst-compress.mir

  Log Message:
  -----------
  [RISCV] Compress stack insts by adjust offset.

For callee saved/restored operations, they mostly use the
following inst patterns,
sw rs2, offset(x2)
sd rs2, offset(x2)
fsw rs2, offset(x2)
fsd rs2, offset(x2)

lw rd, offset(x2)
ld rd, offset(x2)
flw rd, offset(x2)
fld rd, offset(x2)
and offset decides whether the instructions can be compressed.
now offset 2032 will be set by default if stacksize is bigger
than 2^12-1 to save and restore callee saved register, so it
will prevent all the callee saved/restored stack insts be
compressed.
Allocating proper offset for stack insts is useful to make
them be compressed.

Reviewed By: craig.topper, wangpc

Differential Revision: https://reviews.llvm.org/D157373