[all-commits] [llvm/llvm-project] 0816b3: [RISCV] Check floating point vector instruction wi...

[Kito Cheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0816b3efbfaaf958a3f2e842aa3eacd525e7ae12
      https://github.com/llvm/llvm-project/commit/0816b3efbfaaf958a3f2e842aa3eacd525e7ae12
  Author: Kito Cheng <kito.cheng at sifive.com>
  Date:   2023-08-18 (Fri, 18 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-valid-elen-fp.ll

  Log Message:
  -----------
  [RISCV] Check floating point vector instruction with SEW=64 is valid when vsetvl insertion

Scalar move and splat instruction are only demand the SEW is greater than
its own needs, but floating point vector with SEW=64 is not alwaws valid even
SEW=64 is valid, because we have a special configuration: zve64f.

So we need to check floating point vector instruction with SEW=64 is
valid when compute demand of floating point scalar move and splat
instruction.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D158086