[all-commits] [llvm/llvm-project] 9cf675: [RISCVRVVInitUndef] Remove implicit single use ass...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9cf675923afa73a3dbe575803ebbbe9146701df8
      https://github.com/llvm/llvm-project/commit/9cf675923afa73a3dbe575803ebbbe9146701df8
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-07-27 (Thu, 27 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
    M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
    A llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir

  Log Message:
  -----------
  [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF

The code was written with the implicit assumption that each IMPLICIT_DEF either a) the tied operand, or b) an untied source, but not both. This is true right now, but an upcoming change may allow CSE of IMPLICIT_DEFs in some cases, so let's rewrite the code to handle that possibility.

I added an MIR case which demonstrates the multiple use IMPLICIT_DEF. To my knowledge, this is not a reachable configuration from IR right now.

As an aside, this makes the structure a much closer match with the sub-reg liveness case, and we can probably just merge these routines. (Future work.)

Differential Revision: https://reviews.llvm.org/D156477