[all-commits] [llvm/llvm-project] b34a8b: [RISCV] Generalize combineAddOfBooleanXor to suppo...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b34a8b3a5207965f13fd3a700bad612a3afe5867
      https://github.com/llvm/llvm-project/commit/b34a8b3a5207965f13fd3a700bad612a3afe5867
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-25 (Tue, 25 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll

  Log Message:
  -----------
  [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.

Instead of checking for setcc, look for any 0/1 value.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D156153