[all-commits] [llvm/llvm-project] 7e78ec: [mlir][cuda] Add a test-lower-to-nvvm catchall pas...

[Nicolas Vasilache via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7e78ecfe10ea9071234de8d385b87d338d280266
      https://github.com/llvm/llvm-project/commit/7e78ecfe10ea9071234de8d385b87d338d280266
  Author: Nicolas Vasilache <nicolasvasilache at users.noreply.github.com>
  Date:   2023-07-17 (Mon, 17 Jul 2023)

  Changed paths:
    M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
    M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
    M mlir/test/lib/Dialect/CMakeLists.txt
    A mlir/test/lib/Dialect/NVVM/CMakeLists.txt
    A mlir/test/lib/Dialect/NVVM/TestLowerToNVVM.cpp
    M mlir/tools/mlir-opt/CMakeLists.txt
    M mlir/tools/mlir-opt/mlir-opt.cpp

  Log Message:
  -----------
  [mlir][cuda] Add a test-lower-to-nvvm catchall passpipeline.

This mirrors the test-lower-to-llvm pass pipeline that provides some sanity when running e2e examples.

One peculiarity of the GPU pipeline is that we want to allow 32b indexing in kernels.
This is currently not straightforward as there are dependencies between passes.
This new test pass orders passes in a way that connects end-to-end.

Differential Revision: https://reviews.llvm.org/D155463