[all-commits] [llvm/llvm-project] cc68e0: [SVE][CodeGen] Improve codegen for some zero-exten...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cc68e05bd2cc477f7286b5b566558e990f0e5075
      https://github.com/llvm/llvm-project/commit/cc68e05bd2cc477f7286b5b566558e990f0e5075
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2023-07-17 (Mon, 17 Jul 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll

  Log Message:
  -----------
  [SVE][CodeGen] Improve codegen for some zero-extends of masked loads

When doing a masked load of an illegal unpacked type and then
zero-extending to some illegal wider types we sometimes end up
with pointless 'and' instructions that are trying to zero bits
that we already know are zero. This patch fixes that by adding
more cases to performSVEAndCombine.

Differential Revision: https://reviews.llvm.org/D155281