[all-commits] [llvm/llvm-project] 143e2c: [RISCV] Split clmul/clmulh/clmulr builtins into _3...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 143e2c2ac03cbcce290a9f14b0d667bf0f793280
      https://github.com/llvm/llvm-project/commit/143e2c2ac03cbcce290a9f14b0d667bf0f793280
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-14 (Fri, 14 Jul 2023)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsRISCV.def
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c
    M clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkc.c
    M clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c
    M clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkc.c

  Log Message:
  -----------
  [RISCV] Split clmul/clmulh/clmulr builtins into _32 and _64 versions.

This removes another use of 'long' to mean xlen from builtins.

I've also converted the types to unsigned as proposed in D154616.

clmul_32 is available to RV64 as its emulation is clmul+sext.w
clmulh_32 and clmulr_32 are not available on RV64 as their emulation
is currently 6 instructions in the worst case.