[all-commits] [llvm/llvm-project] 62c1cf: [PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc
Kamau Bridgeman via All-commits
all-commits at lists.llvm.org
Fri Jul 14 11:38:54 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 62c1cf7c63f0ef13e41c03de2c83590e6140e5fa
https://github.com/llvm/llvm-project/commit/62c1cf7c63f0ef13e41c03de2c83590e6140e5fa
Author: Kamau Bridgeman <kamau.bridgeman.ibm at gmail.com>
Date: 2023-07-14 (Fri, 14 Jul 2023)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll
Log Message:
-----------
[PowerPC][Future] Enable __builtin_mma_xxm[t|f]acc
Future cpu instructions dmxxinstdmr512 and dmxxextfdmr512 insert and extract
quad vectors from the new wide accumulator(wacc) register class.
The introduction of these new instructions renders the p10 instructions
xxmtacc and xxmfacc obsolete since the new wacc register class is a better
choice for handing quad vector operations. This patch ensures that, for
future cpu, instructions dmxxinstdmr512 and dmxxextfdmr512 are generated
by custom lowering the intrinsics for xxm[t|f]acc to produce no instructions.
Reviewed By: amyk, lei
Differential Revision: https://reviews.llvm.org/D153034
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