[all-commits] [llvm/llvm-project] 5e28d3: [XCOFF][AIX] Peephole optimization for toc-data.

[Sean Fertile via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5e28d30f1fb10faf2db2f8bf0502e7fd72e6ac2e
      https://github.com/llvm/llvm-project/commit/5e28d30f1fb10faf2db2f8bf0502e7fd72e6ac2e
  Author: Sean Fertile <sd.fertile at gmail.com>
  Date:   2023-07-13 (Thu, 13 Jul 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
    M llvm/test/CodeGen/PowerPC/toc-data-const.ll
    A llvm/test/CodeGen/PowerPC/toc-data-peephole-aligment.ll
    M llvm/test/CodeGen/PowerPC/toc-data.ll

  Log Message:
  -----------
  [XCOFF][AIX] Peephole optimization for toc-data.

Followup to D101178 - peephole optimization that converts a
load address instruction and a consuming load/store into just the
load/store when its safe to do so.

eg: converts the 2 instruction code sequence
  la 4, i[TD](2)
  stw 3, 0(4)
to
  stw 3, i[TD](2)

Differential Revision: https://reviews.llvm.org/D101470