[all-commits] [llvm/llvm-project] 6b7805: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single...

[Jeffrey Byrnes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6b7805fcb1827e30a969be039d97434c38873d5d
      https://github.com/llvm/llvm-project/commit/6b7805fcb1827e30a969be039d97434c38873d5d
  Author: Jeffrey Byrnes <JeffreyByrnes at amd.com>
  Date:   2023-07-13 (Thu, 13 Jul 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2b.mir
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir

  Log Message:
  -----------
  [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms

This adds the IGLP strategy for single-wave gemms. The SchedGroup pipeline is laid out in multiple phases, with each phase corresponding to a distinct pattern present in gemm kernels. The resilience of the optimization is dependent upon IR (as seen by pre-RA scheduling) continuing to have these patterns (as defined by instruction class and dependencies) in their current relative ordering.

The kernels of interest have these specific phases:
NT: 1, 2a, 2c
NN: 1, 2a, 2b
TT: 1, 2b, 2c
TN: 1, 2b

The general approach taken was to have a long SchedGroup pipeline. In this way the scheduler will have less capability of doing the wrong thing. In order to resolve the challenge of correctly fitting these long pipelines, we leverage the rules infrastructure to help the solver.

Differential Revision: https://reviews.llvm.org/D149773

Change-Id: I1a35962a95b4bdf740602b8f110d3297c6fb9d96