[all-commits] [llvm/llvm-project] 45b172: [LegalizeDAG] Prevent LegalizeLoadOps from creatin...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 45b172c838cb257a79a9bda19c6fb13617233353
      https://github.com/llvm/llvm-project/commit/45b172c838cb257a79a9bda19c6fb13617233353
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-12 (Wed, 12 Jul 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    A llvm/test/CodeGen/RISCV/pr63816.ll

  Log Message:
  -----------
  [LegalizeDAG] Prevent LegalizeLoadOps from creating extloads that mix int and fp types.

For RISC-V, getRegisterType for fp16 returns i16. i16->fp64 extload
is considered legal because the LoadExtActions defaults to Legal
for all entries. Only fp/fp and int/int entries are changed to
Expand fore RISC-V.

This patch detects the FP-ness has changed and won't try to call
isLoadExtLegal.

Alternatively, we could add Expand for int/fp and fp/int, but that
seemed a little silly.

Fixes #63816

Reviewed By: asb, wangpc

Differential Revision: https://reviews.llvm.org/D155040