[all-commits] [llvm/llvm-project] 9a7677: [mlir] Narrow bitwidth emulation for vector.load

[yzhang93 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9a7677d8ee34e71a27834ab2886d79dfb9e71dae
      https://github.com/llvm/llvm-project/commit/9a7677d8ee34e71a27834ab2886d79dfb9e71dae
  Author: yzhang93 <zhyuhang88 at gmail.com>
  Date:   2023-07-11 (Tue, 11 Jul 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
    M mlir/lib/Dialect/Vector/Transforms/CMakeLists.txt
    A mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
    A mlir/test/Dialect/Vector/vector-emulate-narrow-type.mlir
    M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp

  Log Message:
  -----------
  [mlir] Narrow bitwidth emulation for vector.load

This patch is a following for the previous patch https://reviews.llvm.org/D151519.
With this patch, vector.load op with narrow bitwidth (e.g., i4) can be converted to
supported wider bitwidth (e.g., i8).

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D154178