[all-commits] [llvm/llvm-project] 0fd212: [RISCV] Merge rv32/rv64 vector widening intrinsic ...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0fd212c91d2be638ae25798c1e0b10cf6910cc55
      https://github.com/llvm/llvm-project/commit/0fd212c91d2be638ae25798c1e0b10cf6910cc55
  Author: Jim Lin <jim at andestech.com>
  Date:   2023-07-11 (Tue, 11 Jul 2023)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwadd.ll
    R llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
    R llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwaddu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwaddu.w.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmacc.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmaccsu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmaccu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmaccus.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmul.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmulsu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwmulu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwredsum.ll
    R llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwredsumu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwsub.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwsub.w.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwsubu.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vwsubu.w.ll

  Log Message:
  -----------
  [RISCV] Merge rv32/rv64 vector widening intrinsic tests that have the same content. NFC.