[all-commits] [llvm/llvm-project] 44479b: [AArch64] Ensure constrained register class in INS...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 44479b80a677a6090c39b4bea3aa6982d0aed70c
      https://github.com/llvm/llvm-project/commit/44479b80a677a6090c39b4bea3aa6982d0aed70c
  Author: David Green <david.green at arm.com>
  Date:   2023-07-10 (Mon, 10 Jul 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
    M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir

  Log Message:
  -----------
  [AArch64] Ensure constrained register class in INS peephole.

Ensure we constrain the register class of the NewDef to that of OldDef, in case
they do not match.

Fixes #63777