[all-commits] [llvm/llvm-project] f5ae07: [AIX][TLS] Generate 32-bit local-exec access code ...

[Amy Kwan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f5ae07504846ec967ee8ac51198f17e76632b01b
      https://github.com/llvm/llvm-project/commit/f5ae07504846ec967ee8ac51198f17e76632b01b
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2023-06-20 (Tue, 20 Jun 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
    M llvm/test/CodeGen/PowerPC/aix-tls-le-ldst-double.ll
    M llvm/test/CodeGen/PowerPC/aix-tls-le-ldst-float.ll
    M llvm/test/CodeGen/PowerPC/aix-tls-le-ldst-int.ll
    M llvm/test/CodeGen/PowerPC/aix-tls-le-ldst-longlong.ll
    A llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
    A llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll

  Log Message:
  -----------
  [AIX][TLS] Generate 32-bit local-exec access code sequence

This patch adds support for the TLS local-exec access model on AIX to allow
for the ability to generate the 32-bit (specifically, non-optimized) code sequence.
This work is a follow up of D149722.

The particular sequence that is generated for this sequence is as follows:
```
.tc var[TC],var[TL]@le.   // variable offset, with the le relocation specifier

bla .__get_tpointer()     // get the thread pointer, modifies r3
lwz reg1, var[TC](2)      // load the variable offset
add reg2, r3, reg1        // add the variable offset to the retrieved thread pointer
```

Differential Revision: https://reviews.llvm.org/D152669