[all-commits] [llvm/llvm-project] 437a51: [SME2/SVE2p1] Change psel intrinsic such that the ...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 437a516da8055c28c89dead53c012f71a4331eb9
      https://github.com/llvm/llvm-project/commit/437a516da8055c28c89dead53c012f71a4331eb9
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2023-05-22 (Mon, 22 May 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-psel.ll

  Log Message:
  -----------
  [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.

All the bits of the first operand are copied to the destination register,
if the tested bit (in the second source operand) is active. This means we
copy over all vscale x 16 x i1's of the first operand. There is no need to
overload that type.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D150958


  Commit: 11926e6149d2a68ecb0652b248efe6890c163846
      https://github.com/llvm/llvm-project/commit/11926e6149d2a68ecb0652b248efe6890c163846
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2023-05-22 (Mon, 22 May 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll

  Log Message:
  -----------
  [SME2/SVE2p1] Extend llvm.aarch64.sve.convert.to/from.svbool to accept target("aarch64.svcount")

The convert intrinsics can be used to implement existing operations on svcount_t
when the actual bits/content of the predicate register doesn't matter (such
as PSEL, which copies the full contents of the first source register to the
destination register).

Reviewed By: CarolineConcatto, david-arm

Differential Revision: https://reviews.llvm.org/D150959


Compare: https://github.com/llvm/llvm-project/compare/387c49f693c8...11926e6149d2