[all-commits] [llvm/llvm-project] 2d5892: [LegalizeVectorOps][RISCV] Support condition code ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2d58925362eb59c5b3e74019afb8e35b712913bd
      https://github.com/llvm/llvm-project/commit/2d58925362eb59c5b3e74019afb8e35b712913bd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-04-29 (Sat, 29 Apr 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [LegalizeVectorOps][RISCV] Support condition code legalization for ISD::STRICT_FSETCC/FSETCCS during LegalizeVectorOps.

Switch RISC-V to legalize during LegalizeVectorOps instead of
LegalizeDAG. LegalizeDAG uses the OpVT for legalize action while
LegalizeVectorOps uses the result VT. We really should fix that.