[all-commits] [llvm/llvm-project] e56c6f: [RISCV] Prevent lowerVectorStrictFSetcc from creat...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e56c6f3a8ca8d90ae6c15b4323da390b895f47dc
      https://github.com/llvm/llvm-project/commit/e56c6f3a8ca8d90ae6c15b4323da390b895f47dc
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-04-29 (Sat, 29 Apr 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll

  Log Message:
  -----------
  [RISCV] Prevent lowerVectorStrictFSetcc from creatin an ISD::AND with identical operands.

This AND immediately gets legalized to RISCVISD::VMAND_VL and we don't
yet have DAG combine to optimize that away. So this is a quick fix to
improve generated code.