[all-commits] [llvm/llvm-project] e60968: [DAGCombine][AArch64] Allow transformable to legal...

[Dinar Temirbulatov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e6096871fdd49461687ff57c4882c76477d1d5cd
      https://github.com/llvm/llvm-project/commit/e6096871fdd49461687ff57c4882c76477d1d5cd
  Author: Dinar Temirbulatov <dinar.temirbulatov at arm.com>
  Date:   2023-04-19 (Wed, 19 Apr 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll

  Log Message:
  -----------
  [DAGCombine][AArch64] Allow transformable to legal vectors to be used for MULH lowering.

It looks like it is still profitable to accept a transformable to a legal vector
type, not just a legal vector, as long as vector elements are the same between
two of those types.

Differential Revision: https://reviews.llvm.org/D148229