[all-commits] [llvm/llvm-project] 6c82d1: [SME2][AArch64] Add multi-vector rounding shift le...

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6c82d16d6092302c0d90ccb672a6ceba0b4a84d2
      https://github.com/llvm/llvm-project/commit/6c82d16d6092302c0d90ccb672a6ceba0b4a84d2
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2023-02-23 (Thu, 23 Feb 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll

  Log Message:
  -----------
  [SME2][AArch64] Add multi-vector rounding shift left intrinsics

Adds intrinsics for the following SME2 instructions:
 - srshl (single, 2 & 4 vector)
 - srshl (multi, 2 & 4 vector)
 - urshl (single, 2 & 4 vector)
 - urshl (multi, 2 & 4 vector)

NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D144118