[all-commits] [llvm/llvm-project] 2919ec: [RISCV] Remove side effects from vsetvli intrinsics.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2919ec041f071c5dab4ad17480af697aaf42d707
      https://github.com/llvm/llvm-project/commit/2919ec041f071c5dab4ad17480af697aaf42d707
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-02-03 (Fri, 03 Feb 2023)

  Changed paths:
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
    M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
    M llvm/test/Transforms/InstCombine/RISCV/riscv-vsetvli-knownbits.ll

  Log Message:
  -----------
  [RISCV] Remove side effects from vsetvli intrinsics.

Delete the opt intrinsics since they are now identical.

I left the side effects due to user expectations about how these
interact with things like inline assembly or function calls. Or
that they wouldn't be hoisted. I think we should look at other
ways to address thoughs.

If I could, I'd rename them these somehow to distance them from
the vsetvli instruction. In some sense they only query the VL for
a particular SEW and LMUL. They don't guarantee a vsetvli
instruction will be emitted.

Fixes https://github.com/llvm/llvm-project/issues/59359

Reviewed By: rogfer01, kito-cheng

Differential Revision: https://reviews.llvm.org/D143220