[all-commits] [llvm/llvm-project] fb3e3e: [SDAG] fix miscompiles caused by using ValueTracki...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fb3e3ef62e625e297ee9648e60b6e1c10eda3644
      https://github.com/llvm/llvm-project/commit/fb3e3ef62e625e297ee9648e60b6e1c10eda3644
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2023-02-03 (Fri, 03 Feb 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/AArch64/arm64-fmax-safe.ll
    M llvm/test/CodeGen/AArch64/tbl-loops.ll
    M llvm/test/CodeGen/ARM/neon_minmax.ll
    M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
    M llvm/test/CodeGen/SystemZ/vec-max-05.ll
    M llvm/test/CodeGen/SystemZ/vec-max-min-zerosplat.ll
    M llvm/test/CodeGen/SystemZ/vec-min-05.ll
    M llvm/test/CodeGen/WebAssembly/f32.ll
    M llvm/test/CodeGen/WebAssembly/f64.ll
    M llvm/test/CodeGen/WebAssembly/simd-arith.ll

  Log Message:
  -----------
  [SDAG] fix miscompiles caused by using ValueTracking matchSelectPattern to create FMINIMUM/FMAXIMUM

ValueTracking attempts to match compare+select patterns to FP min/max
operations, but it was created before the newer IEEE-754-2019
minimum/maximum ops were defined. Ie, matchSelectPattern() does not
account for the -0.0/+0.0 behavior that is specified in the newer
standard.

FMINIMUM/FMAXIMUM nodes were created to map to the newer standard:

/// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
/// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
/// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.

We could adjust ValueTracking to deal with signed zero, but it seems like
a moot point given the divergent NaN behavior discussed in D143056, so just
delete this possibility to avoid bugs when converting IR to SDAG.

Differential Revision: https://reviews.llvm.org/D143106