[all-commits] [llvm/llvm-project] e163cd: [AArch64][SME2] Add multi-vector min/max intrinsics

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e163cd224be568f829fe3b69d7ae9e0fa075e4ba
      https://github.com/llvm/llvm-project/commit/e163cd224be568f829fe3b69d7ae9e0fa075e4ba
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2023-01-31 (Tue, 31 Jan 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll

  Log Message:
  -----------
  [AArch64][SME2] Add multi-vector min/max intrinsics

Adds intrinsics for the following SME2 instructions:
 - smax, umax, fmax (single, 2 & 4 vector)
 - smax, umax, fmax (multi, 2 & 4 vector)
 - smin, umin, fmin (single, 2 & 4 vector)
 - smin, umin, fmin (multi, 2 & 4 vector)

NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D142485