[all-commits] [llvm/llvm-project] 2224b5: [PowerPC] Improve materialization for immediates w...

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2224b53f064a824ad85dff0b18ada0da9379460b
      https://github.com/llvm/llvm-project/commit/2224b53f064a824ad85dff0b18ada0da9379460b
  Author: esmeyi <esme.yi at ibm.com>
  Date:   2023-01-31 (Tue, 31 Jan 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/test/CodeGen/PowerPC/constants-i64.ll

  Log Message:
  -----------
  [PowerPC] Improve materialization for immediates which is almost a 32 bit splat.

Summary: Some 64 bit constants can be materialized with fewer instructions than we currently use. We consider a 64 bit immediate value divided into four parts, Hi16OfHi32 (bits 48...63), Lo16OfHi32 (bits 32...47), Hi16OfLo32 (bits 16...31), Lo16OfLo32 (bits 0...15). When any three parts are equal, the immediate can be treated as "almost" a splat of a 32 bit value in a 64 bit register. For such case, we can use 3 instructions to generate the splat and use 1 instruction to modify the different part:

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D139813