[all-commits] [llvm/llvm-project] 88fd2e: [AArch64][SME2] Add multi-vector FP convert from F...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 88fd2e4cb59cdea37cf572e8eb79fbaf73a47178
      https://github.com/llvm/llvm-project/commit/88fd2e4cb59cdea37cf572e8eb79fbaf73a47178
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2023-01-20 (Fri, 20 Jan 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtn.ll

  Log Message:
  -----------
  [AArch64][SME2] Add multi-vector FP convert from Float to interleave Half/BFloat intrinsic

Add the following intrinsic:
  FCVTN
  BFCVTN

NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D142025