[all-commits] [llvm/llvm-project] 61b72f: [AArch64] Add RSHRN and RSHRN2 patterns

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 61b72f6abeb0ed3e43318e5fec8b26d3dc53ca0a
      https://github.com/llvm/llvm-project/commit/61b72f6abeb0ed3e43318e5fec8b26d3dc53ca0a
  Author: David Green <david.green at arm.com>
  Date:   2022-12-22 (Thu, 22 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/neon-rshrn.ll

  Log Message:
  -----------
  [AArch64] Add RSHRN and RSHRN2 patterns

This adds some tablegen patterns for RSHRN, which performs a rounding
shift with narrow. This is similar to the existing SHRN patterns with an
extra addition to perform the rounding, that adds 1<<(shift-1) before
the right shift. Because the round immediate and the shift amount are
tied, it goes via a ComplexPattern that uses a SelectRoundingVLShr
method to perform the selection checks.

aarch64_neon_rshrn are expanded into the sequence of equivalent
instructions (trunc(shr(add(x, 1<<(sht-1)), sht))) so that they can be
converted back into RSHRN. Which also allows us to match raddhn through
the adjusted patterns that previously used aarch64_neon_rshrn.

DIfferential Revision: https://reviews.llvm.org/D140297