[all-commits] [llvm/llvm-project] 50ddc8: [AArch64] GlobalIsel codegen for gpr CTZ

Ties Stuij via All-commits all-commits at lists.llvm.org
Wed Dec 21 03:32:15 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50ddc8cca631bb6bffd69804b9b25d89a1a0bce2
      https://github.com/llvm/llvm-project/commit/50ddc8cca631bb6bffd69804b9b25d89a1a0bce2
  Author: Ties Stuij <ties.stuij at arm.com>
  Date:   2022-12-21 (Wed, 21 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-undef.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/select-cttz.mir

  Log Message:
  -----------
  [AArch64] GlobalIsel codegen for gpr CTZ

If feature CSSC is available, CTTZ intrinsics are lowered using the CTZ
instruction when using GlobalIsel.

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/CTZ--Count-Trailing-Zeros-

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D139418




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