[all-commits] [llvm/llvm-project] 011cbb: [RISCV] Move -riscv-v-vector-bits-max/min options ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 011cbb3912c7c772c10837b393114ecf0d6ad416
      https://github.com/llvm/llvm-project/commit/011cbb3912c7c772c10837b393114ecf0d6ad416
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-12-20 (Tue, 20 Dec 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

  Log Message:
  -----------
  [RISCV] Move -riscv-v-vector-bits-max/min options to RISCVTargetMachine.

Split from D139873.

Reviewed By: reames, kito-cheng

Differential Revision: https://reviews.llvm.org/D140283