[all-commits] [llvm/llvm-project] 695fde: [RISCV] Bugfix for 90f91683 noticed in follow up work

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 695fdef0ef03eba1169e1c91bdefb24c60cb8ab8
      https://github.com/llvm/llvm-project/commit/695fdef0ef03eba1169e1c91bdefb24c60cb8ab8
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-12-15 (Thu, 15 Dec 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  -----------
  [RISCV] Bugfix for 90f91683 noticed in follow up work

I went to extend this locally, and then promptly tripped across a bug which is possible with the landed patch.  The problematic case is:
vsetvli zero, 4, <some vtype>
vmv.x.s x1, v0
vsetvli a0, zero, <same type>

In this case, the naive rewrite - what I had implemented - would form:
vsetvli zero, zero, <same vtype>
vmv.x.s x1, v0

This is, amusingly, correct for the vmv.x.s, but is incorrect for the instructions which follow the sequence and probably rely on VL=VLMAX.  (The VL before the sequence is unknown, and thus doesn't have to be VLMAX.)

I plan to rework the rewrite code to be more robust here, but I wanted to directly fix the bug first.  Sorry for the lack of test; I didn't manage to reproduce this without an additional optimization change after a few minutes of trying.