[all-commits] [llvm/llvm-project] 10d34f: AArch64: use CAS instead of LDXR/STXR if available

[Tim Northover via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 10d34f5538e0d231a172608bdb7d08824771c7c7
      https://github.com/llvm/llvm-project/commit/10d34f5538e0d231a172608bdb7d08824771c7c7
  Author: Tim Northover <t.p.northover at gmail.com>
  Date:   2022-12-14 (Wed, 14 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
    M llvm/test/CodeGen/AArch64/arm64-atomic-128.ll
    M llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
    M llvm/test/CodeGen/AArch64/atomicrmw-xchg-fp.ll

  Log Message:
  -----------
  AArch64: use CAS instead of LDXR/STXR if available

This covers 128-bit loads, and atomicrmw operations without a single native
instruction. Using CAS saves has a better chance of succeeding with high
contention on some systems.