[all-commits] [llvm/llvm-project] 1a4322: [RISCV][CodeGen] Account for LMUL for Vector Permu...

[Michael Maitland via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1a43227ba595aea18bc4ae323fae729883b4d5fb
      https://github.com/llvm/llvm-project/commit/1a43227ba595aea18bc4ae323fae729883b4d5fb
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2022-12-06 (Tue, 06 Dec 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVScheduleV.td

  Log Message:
  -----------
  [RISCV][CodeGen] Account for LMUL for Vector Permutation Instructions

It is likley that subtargets act differently for vector fixed-point arithmetic instructions
based on the LMUL. This patch creates seperate SchedRead, SchedWrite, WriteRes, ReadAdvance
for each relevant LMUL.

Differential Revision: https://reviews.llvm.org/D137428