[all-commits] [llvm/llvm-project] 13e605: [NFC][SROA] Add some more tests for vector promotion

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 13e605051f7d6a08bb1973e70dc3ef6ba1e104ee
      https://github.com/llvm/llvm-project/commit/13e605051f7d6a08bb1973e70dc3ef6ba1e104ee
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2022-11-23 (Wed, 23 Nov 2022)

  Changed paths:
    M llvm/test/Transforms/SROA/vector-promotion.ll

  Log Message:
  -----------
  [NFC][SROA] Add some more tests for vector promotion


  Commit: 6a77477d53542b2cd9d852df4cf1ab16ffa2f4d9
      https://github.com/llvm/llvm-project/commit/6a77477d53542b2cd9d852df4cf1ab16ffa2f4d9
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2022-11-23 (Wed, 23 Nov 2022)

  Changed paths:
    M llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
    M llvm/test/Transforms/SROA/alignment.ll
    M llvm/test/Transforms/SROA/basictest.ll
    M llvm/test/Transforms/SROA/pointer-offset-size.ll
    M llvm/test/Transforms/SROA/scalable-vectors.ll
    M llvm/test/Transforms/SROA/tbaa-struct2.ll

  Log Message:
  -----------
  [NFC][SROA] Autogenerate check lines in some tests being affected by upcoming change


  Commit: 11c2c163de4b7f65ce29cae4f2f36c73392115ae
      https://github.com/llvm/llvm-project/commit/11c2c163de4b7f65ce29cae4f2f36c73392115ae
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2022-11-23 (Wed, 23 Nov 2022)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/memcpy-fixed-align.ll

  Log Message:
  -----------
  [NFC][AMDGPU] Rewrite two test files to avoid completely simplifying away after next patch


  Commit: cf624b23bc5d5a6161706d1663def49380ff816a
      https://github.com/llvm/llvm-project/commit/cf624b23bc5d5a6161706d1663def49380ff816a
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2022-11-23 (Wed, 23 Nov 2022)

  Changed paths:
    M clang/test/CodeGenOpenCL/amdgpu-nullptr.cl
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/test/CodeGen/AMDGPU/v1024.ll
    M llvm/test/DebugInfo/X86/sroasplit-1.ll
    M llvm/test/DebugInfo/X86/sroasplit-4.ll
    M llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
    M llvm/test/Transforms/SROA/address-spaces.ll
    M llvm/test/Transforms/SROA/alignment.ll
    M llvm/test/Transforms/SROA/alloca-address-space.ll
    M llvm/test/Transforms/SROA/basictest.ll
    M llvm/test/Transforms/SROA/pointer-offset-size.ll
    M llvm/test/Transforms/SROA/scalable-vectors.ll
    M llvm/test/Transforms/SROA/slice-width.ll
    M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
    M llvm/test/Transforms/SROA/tbaa-struct.ll
    M llvm/test/Transforms/SROA/tbaa-struct2.ll
    M llvm/test/Transforms/SROA/vector-promotion.ll

  Log Message:
  -----------
  [SROA] `isVectorPromotionViable()`: memory intrinsics operate on vectors of bytes

Now, there's a big caveat here - these bytes
are abstract bytes, not the i8 we have in LLVM,
so strictly speaking this is not exactly legal,
see e.g. https://github.com/AliveToolkit/alive2/issues/860
^ the "bytes" "could" have been a pointer,
and loading it as an integer inserts an implicit ptrtoint.

But at the same time,
InstCombine's `InstCombinerImpl::SimplifyAnyMemTransfer()`
would expand a memtransfer of 1/2/4/8 bytes
into integer-typed load+store,
so this isn't exactly a new problem.

Note that in memory, poison is byte-wise,
so we really can't widen elements,
but SROA seems to be inconsistent here.

Fixes #59116.


Compare: https://github.com/llvm/llvm-project/compare/c4c0e7984ffd...cf624b23bc5d