[all-commits] [llvm/llvm-project] 1c0f54: [mlir] Don't mix -pass-pipeline with other pass op...
rk via All-commits
all-commits at lists.llvm.org
Wed Nov 2 09:14:31 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 1c0f541a4d1d4eebda81838c717b5b58525e6c7f
https://github.com/llvm/llvm-project/commit/1c0f541a4d1d4eebda81838c717b5b58525e6c7f
Author: rkayaith <rkayaith at gmail.com>
Date: 2022-11-02 (Wed, 02 Nov 2022)
Changed paths:
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
M mlir/test/Dialect/GPU/promotion.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-max.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-min.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/Pass/pipeline-parsing.mlir
M mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
Log Message:
-----------
[mlir] Don't mix -pass-pipeline with other pass options
These are test updates required for D135745, which disallows mixing
`-pass-pipeline` and the individual `-pass-name` options.
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D135746
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