[all-commits] [llvm/llvm-project] be369e: [AArch64][SVE2] Add the SVE2.1 while & pext predic...
david-arm via All-commits
all-commits at lists.llvm.org
Wed Nov 2 01:39:18 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: be369ea31b98f23c7d8e7a83ea4a1b4cf76b544f
https://github.com/llvm/llvm-project/commit/be369ea31b98f23c7d8e7a83ea4a1b4cf76b544f
Author: David Sherwood <david.sherwood at arm.com>
Date: 2022-11-02 (Wed, 02 Nov 2022)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/MC/AArch64/SVE2p1/pext-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/pext.s
M llvm/test/MC/AArch64/SVE2p1/whilege-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilege.s
M llvm/test/MC/AArch64/SVE2p1/whilegt-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilegt.s
M llvm/test/MC/AArch64/SVE2p1/whilehi-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilehi.s
M llvm/test/MC/AArch64/SVE2p1/whilehs-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilehs.s
M llvm/test/MC/AArch64/SVE2p1/whilele-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilele.s
M llvm/test/MC/AArch64/SVE2p1/whilelo-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilelo.s
M llvm/test/MC/AArch64/SVE2p1/whilels-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilels.s
M llvm/test/MC/AArch64/SVE2p1/whilelt-diagnostics.s
M llvm/test/MC/AArch64/SVE2p1/whilelt.s
Log Message:
-----------
[AArch64][SVE2] Add the SVE2.1 while & pext predicate pair instructions
This patch adds the assembly/disassembly for the following
predicate pair instructions:
pext: Set pair of predicates from predicate-as-counter
whilelt: While incrementing signed scalar less than scalar
whilele: While incrementing signed scalar less than or equal to scalar
whilegt: While incrementing signed scalar greater than scalar
whilege: While incrementing signed scalar greater than or equal to scalar
whilelo: While incrementing unsigned scalar lower than scalar
whilels: While incrementing unsigned scalar lower or same as scalar
whilehs: While decrementing unsigned scalar higher or same as scalar
whilehi: While decrementing unsigned scalar higher than scalar
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
Differential Revision: https://reviews.llvm.org/D136759
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