[all-commits] [llvm/llvm-project] 3eafca: [AArch64][SVE2] Add the SVE2.1 contiguous load to ...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3eafca58e2dd12dfce6d2273ecff0ee44d16a90e
      https://github.com/llvm/llvm-project/commit/3eafca58e2dd12dfce6d2273ecff0ee44d16a90e
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2022-11-01 (Tue, 01 Nov 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/MC/AArch64/SVE2p1/ld1b-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ld1b.s
    A llvm/test/MC/AArch64/SVE2p1/ld1d-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ld1d.s
    A llvm/test/MC/AArch64/SVE2p1/ld1h-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ld1h.s
    A llvm/test/MC/AArch64/SVE2p1/ld1w-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ld1w.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1b-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1b.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1d-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1d.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1h-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1h.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1w-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/ldnt1w.s

  Log Message:
  -----------
  [AArch64][SVE2] Add the SVE2.1 contiguous load to multiple consecutive vector

This patch adds the assembly/disassembly for the following instructions:

ld1*   : Contiguous load of bytes to multiple consecutive vectors -
         (scalar + scalar) and (scalar + immediate)
ldnt1* : Contiguous load non-temporal of bytes to multiple consecutive
         vectors - (scalar + scalar) and (scalar + immediate)

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09

Differential Revision: https://reviews.llvm.org/D136680