[all-commits] [llvm/llvm-project] 06f640: [X86] Enable EVEX GFNI instructions without avx512bw.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 06f640d3fb060e2e9cfed1d7c44636c7ffe3308b
      https://github.com/llvm/llvm-project/commit/06f640d3fb060e2e9cfed1d7c44636c7ffe3308b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-31 (Mon, 31 Oct 2022)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.def
    M clang/lib/Headers/gfniintrin.h
    M clang/test/CodeGen/X86/gfni-builtins.c
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll

  Log Message:
  -----------
  [X86] Enable EVEX GFNI instructions without avx512bw.

We only really need avx512bw for masking 256 or 512 bit GFNI
instructions due to the need for v32i1 or v64i1.

I wanted to enable 128-bit intrinsics with avx512vl, but the
__builtin_ia32_selectb_128 used in the header file requires avx512bw.
The codegen test for the same is also not using a masked instruction
because vselect with v16i1 mask and v16i8 is not legal so is expanded
before isel. To fix these issues we need a mask specific builtin and a
mask specific ISD opcode.

Fixes PR58687.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D137036