[all-commits] [llvm/llvm-project] 0fe945: [AArch64][SME] Make all SME intrinsics use 32bit i...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0fe945300524ab0d92842f236cfee867204aed14
      https://github.com/llvm/llvm-project/commit/0fe945300524ab0d92842f236cfee867204aed14
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2022-10-31 (Mon, 31 Oct 2022)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-loads.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-mopa.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-mops.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-extract.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-insert.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-stores.ll
    M llvm/test/CodeGen/AArch64/sme-intrinsics-zero.ll

  Log Message:
  -----------
  [AArch64][SME] Make all SME intrinsics use 32bit immediates.

This aligns with what was done for SVE, which consistently uses 32bit
immediates at the LLVM IR level.

Additionally, this change forces the intrinsic operands to be immediates
using ImmArg<>, which subsequently requires the codegenerator to match
TargetConstants instead of Constants.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D136933