[all-commits] [llvm/llvm-project] 691244: [X86] Remove 256-bit scheduler classes

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 691244bd30f74ed3628251f91d2cec28d728db8e
      https://github.com/llvm/llvm-project/commit/691244bd30f74ed3628251f91d2cec28d728db8e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-29 (Sat, 29 Oct 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleSLM.td

  Log Message:
  -----------
  [X86] Remove 256-bit scheduler classes

SLM (silvermont) doesn't support any AVX instructions


  Commit: d9fdc84da7047d0898ad8086fd9360533bac2fae
      https://github.com/llvm/llvm-project/commit/d9fdc84da7047d0898ad8086fd9360533bac2fae
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-29 (Sat, 29 Oct 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/lib/Target/X86/X86SchedIceLake.td
    M llvm/lib/Target/X86/X86SchedSandyBridge.td
    M llvm/lib/Target/X86/X86SchedSkylakeClient.td
    M llvm/lib/Target/X86/X86SchedSkylakeServer.td
    M llvm/lib/Target/X86/X86Schedule.td
    M llvm/lib/Target/X86/X86ScheduleAtom.td
    M llvm/lib/Target/X86/X86ScheduleBdVer2.td
    M llvm/lib/Target/X86/X86ScheduleBtVer2.td
    M llvm/lib/Target/X86/X86ScheduleSLM.td
    M llvm/lib/Target/X86/X86ScheduleZnver3.td

  Log Message:
  -----------
  [X86] Remove the WriteDPPSZ schedule pair

There's never been a 512-bit vdpps instruction (and the implementation is so convoluted there probably won't ever be)


Compare: https://github.com/llvm/llvm-project/compare/17eb198de934...d9fdc84da704