[all-commits] [llvm/llvm-project] 7c44b4: [X86] Add basic test coverage for Issue #58630

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c44b4840b342678a1770925487765ee673e33fe
      https://github.com/llvm/llvm-project/commit/7c44b4840b342678a1770925487765ee673e33fe
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-28 (Fri, 28 Oct 2022)

  Changed paths:
    M llvm/test/CodeGen/X86/smax.ll
    M llvm/test/CodeGen/X86/smin.ll
    M llvm/test/CodeGen/X86/umax.ll
    M llvm/test/CodeGen/X86/umin.ll

  Log Message:
  -----------
  [X86] Add basic test coverage for Issue #58630

If we have sufficient sign bits, we should be able to expand the IMINMAX using only the lower half (and then sign-extend the result to the upper half)


  Commit: 69d117edc29d4c74e034d8474433e981b2702898
      https://github.com/llvm/llvm-project/commit/69d117edc29d4c74e034d8474433e981b2702898
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-28 (Fri, 28 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/test/CodeGen/X86/smax.ll
    M llvm/test/CodeGen/X86/smin.ll
    M llvm/test/CodeGen/X86/umax.ll
    M llvm/test/CodeGen/X86/umin.ll

  Log Message:
  -----------
  [DAG] ExpandIntRes_MINMAX - simplify cases with sufficient number of sign bits

When legalizing a smax/smin/umax/umin op, if we know that the upper half is all sign bits, then we can perform the op on the lower half and then sign extend the result to the upper half.

Alive2: https://alive2.llvm.org/ce/z/rk8Rfd

Fixes #58630


Compare: https://github.com/llvm/llvm-project/compare/5a72df21cbbe...69d117edc29d