[all-commits] [llvm/llvm-project] 974e2e: [RISCV] Adjust RV64I data layout by using n32:64 i...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 974e2e690b4024c2677dde26cc76ec31e0047c1d
      https://github.com/llvm/llvm-project/commit/974e2e690b4024c2677dde26cc76ec31e0047c1d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-28 (Fri, 28 Oct 2022)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.h
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/aext-to-sext.ll
    M llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll
    M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
    M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp

  Log Message:
  -----------
  [RISCV] Adjust RV64I data layout by using n32:64 in layout string

Although i32 type is illegal in the backend, RV64I has pretty good support for i32 types by using W instructions.

By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of `int` or `unsigned int`.

If this patch exposes performance issues, those are better addressed by tuning LSR or other passes.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D116735