[all-commits] [llvm/llvm-project] f6eb08: [trace][intelpt] Fix multi CPU decoding TSC assert...

[Jakob Johnson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6eb089734ddbd7f9b9935a122ff4ad658f06360
      https://github.com/llvm/llvm-project/commit/f6eb089734ddbd7f9b9935a122ff4ad658f06360
  Author: Jakob Johnson <johnsonjakob99 at gmail.com>
  Date:   2022-10-26 (Wed, 26 Oct 2022)

  Changed paths:
    M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp

  Log Message:
  -----------
  [trace][intelpt] Fix multi CPU decoding TSC assertion error

Occasionally the assertion that enforces increasing TSC values in `DecodedThread::NotifyTsc`
would get tripped during large multi CPU trace decoding.
The root cause of this issue was an assumption that all the data of a
PSB will fit within the start,end TSC of the "owning"
`ThreadContinuousExecution`. After investigating, this is not the case
because PSBs can have multiple TSCs.
This diff works around this issue by introducing a TSC upper bound for
each `PSBBlockDecoder`. This fixes the assertion failure by simply
"dropping" the remaining data of PSB whenever the TSC upper bound is
exceeded during decoding.
Future work will do a larger refactor of the multi CPU decoding to
remove the dependencies on this incorrect assumption so that PSB blocks
that span multiple `ThreadContinuousExecutions` are correctly handled.
correctly

Test Plan:

Differential Revision: https://reviews.llvm.org/D136610