[all-commits] [llvm/llvm-project] ef9dfc: [x86] add tests for extract + insert of vector shi...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ef9dfcd6cdb23f6424017981c7e49fd1f4a1d1ef
      https://github.com/llvm/llvm-project/commit/ef9dfcd6cdb23f6424017981c7e49fd1f4a1d1ef
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-10-26 (Wed, 26 Oct 2022)

  Changed paths:
    M llvm/test/CodeGen/X86/vec_shift5.ll

  Log Message:
  -----------
  [x86] add tests for extract + insert of vector shift amount; NFC


  Commit: 3aec0211187b98c4a4e48872df20e86a775e7a8a
      https://github.com/llvm/llvm-project/commit/3aec0211187b98c4a4e48872df20e86a775e7a8a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-10-26 (Wed, 26 Oct 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [SDAG] add helper for opcodes that are not speculatable

This is not quite NFC because one of the users should
now avoid the DIVREM opcodes too, but I'm not sure
how to test that.

I used the same name as an analysis function in IR
in case we want to expand this to include other
operations.

Another potential use is proposed in D136713.


Compare: https://github.com/llvm/llvm-project/compare/8ce5dee74b56...3aec0211187b