[all-commits] [llvm/llvm-project] 11afbf: Update supported features in the generic CPU confi...

[Dan Gohman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 11afbf396e10e1b1e91a5991e2aec1916e29a910
      https://github.com/llvm/llvm-project/commit/11afbf396e10e1b1e91a5991e2aec1916e29a910
  Author: Dan Gohman <dev at sunfishcode.online>
  Date:   2022-10-25 (Tue, 25 Oct 2022)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssembly.td
    M llvm/test/CodeGen/WebAssembly/PR41149.ll
    M llvm/test/CodeGen/WebAssembly/bulk-memory.ll
    M llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
    M llvm/test/CodeGen/WebAssembly/byval.ll
    M llvm/test/CodeGen/WebAssembly/conv-trap.ll
    M llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
    M llvm/test/CodeGen/WebAssembly/global.ll
    M llvm/test/CodeGen/WebAssembly/legalize.ll
    M llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
    M llvm/test/CodeGen/WebAssembly/memory64-feature.ll
    M llvm/test/CodeGen/WebAssembly/multivalue.ll
    M llvm/test/CodeGen/WebAssembly/mutable-globals.ll
    M llvm/test/CodeGen/WebAssembly/reference-types.ll
    M llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
    M llvm/test/CodeGen/WebAssembly/simd-conversions.ll
    M llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
    M llvm/test/CodeGen/WebAssembly/tailcall.ll
    M llvm/test/CodeGen/WebAssembly/target-features-tls.ll
    M llvm/test/CodeGen/WebAssembly/target-features.ll

  Log Message:
  -----------
  Update supported features in the generic CPU configuration

Accompanying https://reviews.llvm.org/D125728, this updates LLVM
Codegen's "generic" CPU to enable the same new features.

Differential Revision: https://reviews.llvm.org/D125729