[all-commits] [llvm/llvm-project] f8b842: [RISCV] Add Svnapot extension

[Piyou Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f8b8426861a7a26ff60fe085800cc338591bee41
      https://github.com/llvm/llvm-project/commit/f8b8426861a7a26ff60fe085800cc338591bee41
  Author: Piyou Chen <piyou.chen at sifive.com>
  Date:   2022-10-24 (Mon, 24 Oct 2022)

  Changed paths:
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/attributes.ll

  Log Message:
  -----------
  [RISCV] Add Svnapot extension

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D136570