[all-commits] [llvm/llvm-project] 03b145: [AArch64] Add tablegen patterns for bf16 trn/zip/uzp.

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03b145480d05575ebc0ce817fb07ae5f02dffb20
      https://github.com/llvm/llvm-project/commit/03b145480d05575ebc0ce817fb07ae5f02dffb20
  Author: David Green <david.green at arm.com>
  Date:   2022-10-05 (Wed, 05 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    A llvm/test/CodeGen/AArch64/bf16-shuffle.ll

  Log Message:
  -----------
  [AArch64] Add tablegen patterns for bf16 trn/zip/uzp.

This adds some missing tablegen patterns to handle trn1/trn2/zip1/zip2/uzp1/uzp2,
similar to the Arm handling in 5e1a9d319d2ee5d59a151e1d82f, but via tablegen
patterns for the AArch64 backend.