[all-commits] [llvm/llvm-project] a7aaaf: [AArch64][GlobalISel] Implement custom legalizatio...

Jessica Paquette via All-commits all-commits at lists.llvm.org
Wed Sep 28 16:03:59 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a7aaafde2ef5cdcb8a930a6be1bc638721b515ff
      https://github.com/llvm/llvm-project/commit/a7aaafde2ef5cdcb8a930a6be1bc638721b515ff
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2022-09-28 (Wed, 28 Sep 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcopysign.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Implement custom legalization for s32/s64 G_FCOPYSIGN

This is intended to be equivalent to the s32 + s64 cases in
AArch64TargetLowering::LowerFCOPYSIGN.

Widen everything and then use G_BIT + a mask to handle the actual copysign
operation. Then, narrow back down to s32/s64.

I wasn't sure about what the best/most canonical INSERT_SUBREG-selectable
pattern is. I chose G_INSERT_VECTOR_ELT + an undef vector because it produces
reasonably okay codegen. (It doesn't produce INSERT_SUBREG right now though.)
If there's a better way to do this then I'm happy to change it.

We also have a couple codegen deficiencies with how we emit vector constants
right now. (We need a GISel equivalent to the tryAdvSIMDModImm64 stuff)

Differential Revision: https://reviews.llvm.org/D108725




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